Загрузить файлы в «venv/Lib/site-packages/greenlet/platform»

venv/Lib/site-packages/greenlet/platform/switch_riscv_unix.h

@@ -0,0 +1,41 @@
+#define STACK_REFPLUS 1
+
+#ifdef SLP_EVAL
+#define STACK_MAGIC 0
+
+#define REGS_TO_SAVE "s1", "s2", "s3", "s4", "s5", \
+		     "s6", "s7", "s8", "s9", "s10", "s11", "fs0", "fs1", \
+		     "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", "fs8", "fs9", \
+		     "fs10", "fs11"
+
+static int
+slp_switch(void)
+{
+  int ret;
+  long fp;
+  long *stackref, stsizediff;
+
+  __asm__ volatile ("" : : : REGS_TO_SAVE);
+  __asm__ volatile ("mv %0, fp" : "=r" (fp) : );
+  __asm__ volatile ("mv %0, sp" : "=r" (stackref) : );
+  {
+      SLP_SAVE_STATE(stackref, stsizediff);
+      __asm__ volatile (
+	  "add sp, sp, %0\n\t"
+	  "add fp, fp, %0\n\t"
+	  : /* no outputs */
+	  : "r" (stsizediff)
+	  );
+      SLP_RESTORE_STATE();
+  }
+  __asm__ volatile ("" : : : REGS_TO_SAVE);
+#if __riscv_xlen == 32
+  __asm__ volatile ("lw fp, %0" : : "m" (fp));
+#else
+  __asm__ volatile ("ld fp, %0" : : "m" (fp));
+#endif
+  __asm__ volatile ("mv %0, zero" : "=r" (ret) : );
+  return ret;
+}
+
+#endif

venv/Lib/site-packages/greenlet/platform/switch_s390_unix.h

@@ -0,0 +1,87 @@
+/*
+ * this is the internal transfer function.
+ *
+ * HISTORY
+ * 25-Jan-12  Alexey Borzenkov <snaury@gmail.com>
+ *      Fixed Linux/S390 port to work correctly with
+ *      different optimization options both on 31-bit
+ *      and 64-bit. Thanks to Stefan Raabe for lots
+ *      of testing.
+ * 24-Nov-02  Christian Tismer  <tismer@tismer.com>
+ *      needed to add another magic constant to insure
+ *      that f in slp_eval_frame(PyFrameObject *f)
+ *      STACK_REFPLUS will probably be 1 in most cases.
+ *      gets included into the saved stack area.
+ * 06-Oct-02  Gustavo Niemeyer <niemeyer@conectiva.com>
+ *      Ported to Linux/S390.
+ */
+
+#define STACK_REFPLUS 1
+
+#ifdef SLP_EVAL
+
+#ifdef __s390x__
+#define STACK_MAGIC 20 /* 20 * 8 = 160 bytes of function call area */
+#else
+#define STACK_MAGIC 24 /* 24 * 4 = 96 bytes of function call area */
+#endif
+
+/* Technically, r11-r13 also need saving, but function prolog starts
+   with stm(g) and since there are so many saved registers already
+   it won't be optimized, resulting in all r6-r15 being saved */
+#define REGS_TO_SAVE "r6", "r7", "r8", "r9", "r10", "r14", \
+		     "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
+		     "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
+
+static int
+slp_switch(void)
+{
+    int ret;
+    long *stackref, stsizediff;
+    __asm__ volatile ("" : : : REGS_TO_SAVE);
+#ifdef __s390x__
+    __asm__ volatile ("lgr %0, 15" : "=r" (stackref) : );
+#else
+    __asm__ volatile ("lr %0, 15" : "=r" (stackref) : );
+#endif
+    {
+        SLP_SAVE_STATE(stackref, stsizediff);
+/* N.B.
+   r11 may be used as the frame pointer, and in that case it cannot be
+   clobbered and needs offsetting just like the stack pointer (but in cases
+   where frame pointer isn't used we might clobber it accidentally). What's
+   scary is that r11 is 2nd (and even 1st when GOT is used) callee saved
+   register that gcc would chose for surviving function calls. However,
+   since r6-r10 are clobbered above, their cost for reuse is reduced, so
+   gcc IRA will chose them over r11 (not seeing r11 is implicitly saved),
+   making it relatively safe to offset in all cases. :) */
+        __asm__ volatile (
+#ifdef __s390x__
+            "agr 15, %0\n\t"
+            "agr 11, %0"
+#else
+            "ar 15, %0\n\t"
+            "ar 11, %0"
+#endif
+            : /* no outputs */
+            : "r" (stsizediff)
+            );
+        SLP_RESTORE_STATE();
+    }
+    __asm__ volatile ("" : : : REGS_TO_SAVE);
+    __asm__ volatile ("lhi %0, 0" : "=r" (ret) : );
+    return ret;
+}
+
+#endif
+
+/*
+ * further self-processing support
+ */
+
+/* 
+ * if you want to add self-inspection tools, place them
+ * here. See the x86_msvc for the necessary defines.
+ * These features are highly experimental und not
+ * essential yet.
+ */

venv/Lib/site-packages/greenlet/platform/switch_sh_gcc.h

@@ -0,0 +1,36 @@
+#define STACK_REFPLUS 1
+
+#ifdef SLP_EVAL
+#define STACK_MAGIC 0
+#define REGS_TO_SAVE "r8", "r9", "r10", "r11", "r13", \
+                     "fr12", "fr13", "fr14", "fr15"
+
+// r12 Global context pointer, GP
+// r14 Frame pointer, FP
+// r15 Stack pointer, SP
+
+static int
+slp_switch(void)
+{
+    int err;
+    void* fp;
+    int *stackref, stsizediff;
+    __asm__ volatile("" : : : REGS_TO_SAVE);
+    __asm__ volatile("mov.l r14, %0" : "=m"(fp) : :);
+    __asm__("mov r15, %0" : "=r"(stackref));
+    {
+        SLP_SAVE_STATE(stackref, stsizediff);
+        __asm__ volatile(
+            "add %0, r15\n"
+            "add %0, r14\n"
+            : /* no outputs */
+            : "r"(stsizediff));
+        SLP_RESTORE_STATE();
+        __asm__ volatile("mov r0, %0" : "=r"(err) : :);
+    }
+    __asm__ volatile("mov.l %0, r14" : : "m"(fp) :);
+    __asm__ volatile("" : : : REGS_TO_SAVE);
+    return err;
+}
+
+#endif

venv/Lib/site-packages/greenlet/platform/switch_sparc_sun_gcc.h

@@ -0,0 +1,92 @@
+/*
+ * this is the internal transfer function.
+ *
+ * HISTORY
+ * 16-May-15  Alexey Borzenkov <snaury@gmail.com>
+ *      Move stack spilling code inside save/restore functions
+ * 30-Aug-13  Floris Bruynooghe <flub@devork.be>
+        Clean the register windows again before returning.
+        This does not clobber the PIC register as it leaves
+        the current window intact and is required for multi-
+        threaded code to work correctly.
+ * 08-Mar-11  Floris Bruynooghe <flub@devork.be>
+ *      No need to set return value register explicitly
+ *      before the stack and framepointer are adjusted
+ *      as none of the other registers are influenced by
+ *      this.  Also don't needlessly clean the windows
+ *      ('ta %0" :: "i" (ST_CLEAN_WINDOWS)') as that
+ *      clobbers the gcc PIC register (%l7).
+ * 24-Nov-02  Christian Tismer  <tismer@tismer.com>
+ *      needed to add another magic constant to insure
+ *      that f in slp_eval_frame(PyFrameObject *f)
+ *      STACK_REFPLUS will probably be 1 in most cases.
+ *      gets included into the saved stack area.
+ * 17-Sep-02  Christian Tismer  <tismer@tismer.com>
+ *      after virtualizing stack save/restore, the
+ *      stack size shrunk a bit. Needed to introduce
+ *      an adjustment STACK_MAGIC per platform.
+ * 15-Sep-02  Gerd Woetzel       <gerd.woetzel@GMD.DE>
+ *      added support for SunOS sparc with gcc
+ */
+
+#define STACK_REFPLUS 1
+
+#ifdef SLP_EVAL
+
+
+#define STACK_MAGIC 0
+
+
+#if defined(__sparcv9)
+#define SLP_FLUSHW __asm__ volatile ("flushw")
+#else
+#define SLP_FLUSHW __asm__ volatile ("ta 3") /* ST_FLUSH_WINDOWS */
+#endif
+
+/* On sparc we need to spill register windows inside save/restore functions */
+#define SLP_BEFORE_SAVE_STATE() SLP_FLUSHW
+#define SLP_BEFORE_RESTORE_STATE() SLP_FLUSHW
+
+
+static int
+slp_switch(void)
+{
+    int err;
+    int *stackref, stsizediff;
+
+    /* Put current stack pointer into stackref.
+     * Register spilling is done in save/restore.
+     */
+    __asm__ volatile ("mov %%sp, %0" : "=r" (stackref));
+
+    {
+        /* Thou shalt put SLP_SAVE_STATE into a local block */
+        /* Copy the current stack onto the heap */
+        SLP_SAVE_STATE(stackref, stsizediff);
+
+        /* Increment stack and frame pointer by stsizediff */
+        __asm__ volatile (
+            "add %0, %%sp, %%sp\n\t"
+            "add %0, %%fp, %%fp"
+            : : "r" (stsizediff));
+
+        /* Copy new stack from it's save store on the heap */
+        SLP_RESTORE_STATE();
+
+        __asm__ volatile ("mov %1, %0" : "=r" (err) : "i" (0));
+        return err;
+    }
+}
+
+#endif
+
+/*
+ * further self-processing support
+ */
+
+/*
+ * if you want to add self-inspection tools, place them
+ * here. See the x86_msvc for the necessary defines.
+ * These features are highly experimental und not
+ * essential yet.
+ */

venv/Lib/site-packages/greenlet/platform/switch_x32_unix.h

@@ -0,0 +1,63 @@
+/*
+ * this is the internal transfer function.
+ *
+ * HISTORY
+ * 17-Aug-12  Fantix King <fantix.king@gmail.com>
+ *      Ported from amd64.
+ */
+
+#define STACK_REFPLUS 1
+
+#ifdef SLP_EVAL
+
+#define STACK_MAGIC 0
+
+#define REGS_TO_SAVE "r12", "r13", "r14", "r15"
+
+
+static int
+slp_switch(void)
+{
+    void* ebp;
+    void* ebx;
+    unsigned int csr;
+    unsigned short cw;
+    int err;
+    int *stackref, stsizediff;
+    __asm__ volatile ("" : : : REGS_TO_SAVE);
+    __asm__ volatile ("fstcw %0" : "=m" (cw));
+    __asm__ volatile ("stmxcsr %0" : "=m" (csr));
+    __asm__ volatile ("movl %%ebp, %0" : "=m" (ebp));
+    __asm__ volatile ("movl %%ebx, %0" : "=m" (ebx));
+    __asm__ ("movl %%esp, %0" : "=g" (stackref));
+    {
+        SLP_SAVE_STATE(stackref, stsizediff);
+        __asm__ volatile (
+            "addl %0, %%esp\n"
+            "addl %0, %%ebp\n"
+            :
+            : "r" (stsizediff)
+            );
+        SLP_RESTORE_STATE();
+    }
+    __asm__ volatile ("movl %0, %%ebx" : : "m" (ebx));
+    __asm__ volatile ("movl %0, %%ebp" : : "m" (ebp));
+    __asm__ volatile ("ldmxcsr %0" : : "m" (csr));
+    __asm__ volatile ("fldcw %0" : : "m" (cw));
+    __asm__ volatile ("" : : : REGS_TO_SAVE);
+    __asm__ volatile ("xorl %%eax, %%eax" : "=a" (err));
+    return err;
+}
+
+#endif
+
+/*
+ * further self-processing support
+ */
+
+/*
+ * if you want to add self-inspection tools, place them
+ * here. See the x86_msvc for the necessary defines.
+ * These features are highly experimental und not
+ * essential yet.
+ */